So-called “surface” technologies (in contrast to bulk technologies) enable the size of electromechanical structures made on silicon to be reduced (micro-electromechanical systems (MEMS) and/or nano-electromechanical systems (NEMS). These technologies rely on using a stack of at least three layers: a mechanical layer (of thickness typically lying in the range 0.1 micrometer (μm) to 100 μm); a sacrificial layer (of thickness typically lying in the range 0.1 μm to a few μm); and a support (of thickness typically lying in the range 10 μm to 1000 μm). Selective chemical etching of the sacrificial layer serves to make functional structures in the mechanical layer that are locally independent of the support.
The non-etched zones of the sacrificial layer enable so-called “anchor” zones to be made whereby the mechanical structure is connected to the support.
A given method is characterized in particular by the choice of materials for the pair of materials comprising the mechanical layer and the sacrificial layer, and by the choice of method of enabling them to be associated with the support.
The choice of method is based on various criteria depending on the type of component to be made, however in order to have a method that is flexible and suitable for being adapted to a wide range of requirements, e.g. for making a mechanical layer on a sacrificial layer, the main criteria involved are as follows:                the quality of the mechanical layer, firstly the stability of its mechanical properties, but also the precision available for controlling its dimensions, in particular the precision concerning its thickness;        and/or the possibility of controlling the lateral dimensions of the anchor zones by inserting, in the sacrificial layer, zones that are not attacked by the chemical etching, so as to avoid being dependent on achieving control by controlling the duration of etching, which is sensitive to design;        and/or the possibility of having one or more levels of electrical interconnections above and/or below the mechanical layer, suitable for being used as electrodes, where necessary.        
The family of methods in the most widespread use relies on silicon and silica as the pair of materials for the mechanical layer and the sacrificial layer respectively, associated with selective etching of the silica by HF (in liquid or vapor form). This family forms part of the silicon-on-insulator (SOI) MEMS family of methods.
The simplest SOI-MEMS methods make two SiO2/Si layers by successively depositing materials: SiO2 thermally or by chemical vapor deposition (CVD) which may be plasma-enhanced (PECVD), low pressure CVD (LPCVD), or atomic layer CVD (ALCVD) if very fine; Si by CVD of the PE, LP, or reactive plasma (RP) type, or depositing a very fine atomic layer (ALD) on a silicon support such as a solid silicon substrate.
These methods are advantageous because:                the thickness of the mechanical layer is controlled by the duration of the deposition of the silicon layer;        any anchor zones are very well controlled since it is possible to make use directly of the mechanical layer by locally etching the oxide layer prior to depositing the silicon; and        it is possible to make interconnections at different levels.        
Nevertheless, the silicon constituting the mechanical layer deposited on the oxide is polycrystalline silicon, thereby making it more difficult to control its mechanical qualities (stresses, stability, . . . ) and it is possible to reach a thickness limit.
Known improvements to those methods make it possible to use monocrystalline silicon as the mechanical layer, it being considered that the mechanical properties of monocrystalline silicon are better and that the range of available thicknesses is larger.
Mention may also be made of three large families of known methods of making an MEMS with a monocrystalline silicon mechanical layer by using SOI-MEMS technology, which families differ in the method used for making the substrate that includes the complete stack:
1) The initial substrate is a fine SOI substrate of the microelectronic type having controlled thickness (typically of the order of 100 nanometers (nm)), e.g. made by cleaving using the “Smart Cut” technology (registered trademark). The SiO2 layer that acts as an insulator relative to the substrate is used as a sacrificial layer and the fine silicon layer is used as a basis for growing silicon epitaxially, thereby enabling its monocrystalline nature to be conserved.
It is also known to make interconnection levels above the mechanical layer SiN or polycrystalline Si anchors as described in the article “Polysilicon packaging and a new anchoring technology for thick SOI-MEMS—dynamic response model and application to over-damped inertial sensors” by B. Diem et al., published in the 13th International Conference on Solid State Sensors, Actuators, and Microsensors, Seoul, Jun. 5-9, 2005, pp. 527-530.
2) The initial substrate is a silicon substrate including an oxide layer. The mechanical layer is made by bonding a thick second silicon substrate which is then thinned by rectification and polishing (see for example application WO 2006/035031). With that method, the sacrificial layer is used as a bonding layer; the quality of bonding is critical since it must guarantee that chemical etching is uniform. It is possible to implement anchor zones in the sacrificial layer prior to bonding, but that requires the ability to control bonding on heterogeneous substrates.
3) The initial substrate is a thick silicon substrate having a sacrificial oxide layer deposited thereon followed by a functionalization multilayer structure comprising SiN associated with polycrystalline Si and finally a top bonding layer of polycrystalline Si. That initial stack is bonded onto a second silicon substrate that acts as a support. The thick base substrate is then thinned by rectification followed by polishing so as to make the mechanical layer. Reference can be made for example to the article by T. Yamamoto et al., (“Capacitive accelerometer with high aspect ratio single crystalline silicon microstructure using the SOI structure with polysilicon-based interconnect technique”, published in MEMS 2000, the 13th International Annual Conference, Jan. 23-27, 2000, Miyazaki, Japan, pp. 514-519). The proposed method makes it possible to use polycrystalline Si to make anchor zones, interconnection layers, and buried electrodes, and the bonding layer is distinct from the sacrificial layer, and thus the quality of bonding is much less critical since it performs mechanical functions only.
Of the above-mentioned methods, only method 1) enables the thickness of the mechanical layer to be controlled accurately. Thinning the base substrate to obtain the mechanical layer as proposed in methods 2) and 3) can be performed at present with accuracy no better than about ±0.5 μm (under the best of circumstances and on 200 mm wafers) and it depends on the fluctuations in the thicknesses of the silicon substrates used. When the thickness of the structures is of the order of a few μm, such precision is not sufficient, in particular when the thickness is used to dimension elasticity, as applies for example with force sensors; in general, it is desired to obtain sensitivity variation of less than 10%, it being understood that sensitivity varies with the cube of thickness.
For method 1), thickness is determined by the duration of the epitaxial growth of the fine layer of Si, thereby providing much better accuracy. This principle is proposed to improve method 2) by using as the second substrate an epitaxially-grown SOI substrate.
However, under all circumstances, modified method 1) or method 2) are methods that are not as flexible as method 3), which makes it possible simultaneously to make both etching stops and buried electrodes.
Known layer transfer methods of making substrates are well adapted to controlling the thicknesses of the layers, but they are used for making a structure constituted by a layer on insulation, typically on oxide. The bonding operation is thus performed via said layer which for methods of fabricating MEMS type electromechanical structures is used as a sacrificial layer. As emphasized above, bonding is then critical since its quality depends on the uniformity of the etching and on the ability to control its speed.
At present there does not exist a method that is well adapted to making MEMS type electromechanical structures and that enables the thickness of the active layer to be controlled with precision.